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PowerPC Mac Liberation Army

PCI Bus mastering

Forum IndexPCI Power Macs & PowerBooks

Is there a preferred model according to card function for installation of PCI cards into slots A to E of Kansas and Tsunami logic boards?

I have seen , but cannot rediscover, (perhaps folklore) references to the desirability of placing SCSI host adapters into slot A, which I do and find to be satisfactory. I also place video cards into F and ethernet into E with satisfactory results. That obliges use of FireWire and USB cards in B, C or D. A USB-only card in slot C is presently giving me three copies of its data in ASP. If Apple's own Developer literature is to be believed as negative confirmation, all slots are bus-master capable, but ...

I use a similar hierarchy in the admittedly fewer slots of NuBus machines, wherein SCSI host adapters don't often (Q950/WGS95 excepted) feature. If nothing else, consistent slot assignment makes finding rear connectors of the cards from the fronts of the machines much easier.

de
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(60x) 13DT + 3PB + PTPro; (G3) 7DT/MT; (G4) 3T + PB. System 8.1 to OS 10.5.8
Although I can't think of any reason why I might have had such a thing in my spares box, I have to believe that the maverick USB card above was from the PeeCee world. It was made, as many such are, by Anonymous Inc., and the maker's number in ASP was no help at all.

However, when I replaced it with a known-good card from another Mac and re-installed the USB Support 1.4.1 from Apple (not least because I had also upgraded the OS on the 9650 to 9.2.2), the misbehaviour went away.

de
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(60x) 13DT + 3PB + PTPro; (G3) 7DT/MT; (G4) 3T + PB. System 8.1 to OS 10.5.8
After some searching, I can't find any references in Mac documentation, but on the PC end, certain PCI slots are mapped to certain hardware interrupts. Since there are only six interrupts, and all of the PCI slots have to share them, along with onboard devices, it was usually a good idea to put PCI cards so that they used an interrupt that was not already in use. (In some server motherboards I dealt with, this was impossible. There were enough onboard devices to use every single interrupt, so if you plugged in a card, you were immediately sharing.)

If you HAD to share an interrupt, it was a good idea to either always have 'low-bandwidth' devices sharing, with 'high bandwidth' devices alone. (So SCSI on one, Gigabit Ethernet on a second, USB 1.1 sharing with sound on a third.)

This has nothing to do with bus mastering, and everything to do with interrupts. (Which is a legacy of the PC's old fashioned IRQs, which is why I'm not certain how the Mac handles it.)
Thank you for taking the trouble to do some research. It gels with what I understand to be the guiding principle that I haven't been able to refind. The offending card was never functional in USB-mediated transfers. Although it didn't recognize the only USB device that I plugged into it (a SanDisk Cruzer 1GB), it also did not interfere with its neighbours in any obvious way.

An answer to my question about hierarchy of slot assignment in Macs is still of interest to me, but the USB-related puzzle seems to have been solved with a more appropriate marriage. (Devilish business, this miscegenation ...)

de
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(60x) 13DT + 3PB + PTPro; (G3) 7DT/MT; (G4) 3T + PB. System 8.1 to OS 10.5.8
I'm a little late to this party, but I may have some info to contribute.

I don't recall how the six slot (genuine - Umax is special) Macs are mapped (I think A1, B1, C1 are the top three slots and D2, E2, F2 are the bottom three), but I do know that they are separate busses controlled by independent Bandit chips. One set of slots (A1, B1, C1) share a Bandit with the Grand Central IC on the motherboard. So these slots also share PCI bandwidth with the on-board devices like ethernet, sound, SCSI, etc. One could experience a small performance gain by putting high-bandwidth cards in the lower slots. In particular, slots A1 and D2 have a peculiarity of software/hardware design that gives them slightly better cache performance.

Oh, check out this post on AppleFritter: http://www.applefritter.com/node/9310#comment-27565

That, in turn, quotes Jeff Walther whose name I seem to recognize for some reason...

Peace,
Drew
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Power to the PowerPC!
JW is trag, contributor to this forum, 'Fritter and 68KMLA. He is also the maker and seller of the 64-pin 16MB SIMMs for IIfx and other bits, in recent times.

All of what you wrote about the two buses, with the exception of avoiding Bandit 1 for performance gain, was more-or-less familiar from past reading. That link was useful, and I thank you. I may have read it at the time, and recently been looking in the wrong place for the info. in it. I shall certainly chase up the Developer article.

I happily put G4 CPUs into Beige G3s, but never more than G3s into the 60x Macs. Mostly it works, but the present 9650 (G3/500) is being a bit of a beastard in several ways. I shall look again, hard, at my slot hierarchy, despite that I had thought that that was settled.

de
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(60x) 13DT + 3PB + PTPro; (G3) 7DT/MT; (G4) 3T + PB. System 8.1 to OS 10.5.8